The x92FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE) input is low. When OE is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches. The x92FCT573T devices are identical to the x92FCT373T devices, except for the flow-through pinout of the x92FCT573T, which simplifies board design.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Number of channels | 8 |
| Technology family | FCT |
| Supply voltage (min) (V) | 4.75 |
| Supply voltage (max) (V) | 5.25 |
| Input type | TTL-Compatible CMOS |
| Output type | 3-State |
| Clock frequency (max) (MHz) | 70 |
| IOL (max) (mA) | 64 |
| IOH (max) (mA) | -32 |
| Supply current (max) (µA) | 200 |
| Features | Flow-through pinout, Partial power down (Ioff), Very high speed (tpd 5-10ns) |
| Operating temperature range (°C) | -40 to 85 |
| Rating | Catalog |
| PDIP (N) | 20 | 228.702 mm² 24.33 x 9.4 |
| SOIC (DW) | 20 | 131.84 mm² 12.8 x 10.3 |
| SSOP (DBQ) | 20 | 51.9 mm² 8.65 x 6 |
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