CD4515B系列介绍资料

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CD4515B

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CMOS 4 位锁存器/4 至16 线路解码器

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CD4514B and CD4515B consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0 (CD4514B) or 1 (CD4515B) regardless of the state of the data or strobe inputs.

The decode truth table indicates all combinations of data inputs and appropriate selected outputs.

These devices are similar to industry types MC14514 and MC14515.

The CD4514B and CD4515B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages (M and M96 suffixes).

CD4514B Output "High" on Select
CD4515B Output "Low" on Select

Strobed input latch
Inhibit control
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
- 1 V at V_DD = 5 V
- 2 V at V_DD = 10 V
- 2.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Standardized, symmetrical output characteristics
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Digital multiplexing
- Address decoding
- Hexadecimal/BCD decoding
- Program-counter decoding
- Control decoder

Data sheet acquired from Harris Semiconductor.

Technology family	CD4000
Number of channels	1
Operating temperature range (°C)	-55 to 125
Rating	Catalog
Supply current (max) (µA)	3000

SOIC (DW)

159.65 mm² 15.5 x 10.3

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CD4515B

CMOS 4 位锁存器/4 至16 线路解码器

4000-306-326