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TI(德州仪器) CD4035B
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  • TI(德州仪器) CD4035B
  • TI(德州仪器) CD4035B
  • TI(德州仪器) CD4035B
  • TI(德州仪器) CD4035B
  • TI(德州仪器) CD4035B
  • TI(德州仪器) CD4035B
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CD4035B

CD4035B

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CMOS 4 级并行输入/并行输出移位寄存器

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CD4035B is a four-stage clocked signal serial register with provision for synchronous PARALLEL inputs to each stage and SERIAL inputs to the first stage via JK logic. Register stages 2, 3, and 4 are coupled in a serial D flip-flop configuration when the register is in the serial mode (PARALLEL/SERIAL control low).

Parallel entry into each register stage is permitted when the PARALLEL/SERIAL control is high.

In the parallel or serial mode information is transferred on positive clock transitions.

When the TRUE/COMPLEMENT control is high, the true contents of the register are available at the output terminals. When the TRUE/COMPLEMENT control is low, the outputs are the complements of the data in the register. THe TRUE/COMPLEMENT control functions asynchronously with respect to the CLOCK signal.

JK input logic is provided on the first stage SERIAL input to minimize logic requirements particularly in counting and sequence-generation applications. With JK inputs connected together, the first stage becomes a D flip-flop. An asynchronous common RESET is also provided.

The CD4035B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

  • 4-Stage clocked shift operation
  • Synchronous parallel entry on all 4 stages
  • JK inputs on first stage
  • Asynchronous True/Complement control on all outputs
  • Static flip-flop operation; Master-slave configuration
  • Buffered inputs and outputs
  • High speed — 12 MHz (typ.) at VDD = 10 V
  • 100% tested for quiescent current at 20 V
  • Standardized, symmetrical output characteristics
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13A, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Counters, Registers
      • Arithmetic-unit registers
      • Shift-left — shift right registers
      • Serial-to-parallel/parallel-to-serial conversions
    • Sequence generation
    • Control circuits
    • Code conversion

ConfigurationUniversal
Bits (#)4
Technology familyCD4000
Supply voltage (min) (V)3
Supply voltage (max) (V)18
Input typeStandard CMOS
Output typePush-Pull
Clock frequency (MHz)8.5
IOL (max) (mA)4.2
IOH (max) (mA)-4.2
Supply current (max) (µA)3000
FeaturesBalanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns)
Operating temperature range (°C)-55 to 125
RatingCatalog
PDIP (N)16181.42 mm² 19.3 x 9.4
SOIC (D)1659.4 mm² 9.9 x 6
TSSOP (PW)1632 mm² 5 x 6.4
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