CD4572UB Hex Gate provides the system designer with direct implementation of inverter, NAND, and NOR functions and supplements the existing family of CMOS gates.
The CD4572UB devices meet all requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices."
The CD4572UB types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
| Technology family | CD4000 |
| Supply voltage (min) (V) | 3 |
| Supply voltage (max) (V) | 18 |
| Number of channels | 6 |
| Inputs per channel | 2 |
| IOL (max) (mA) | 6.8 |
| IOH (max) (mA) | -6.8 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Features | Standard speed (tpd > 50ns) |
| Data rate (max) (Mbps) | 16 |
| Rating | Catalog |
| Operating temperature range (°C) | -55 to 125 |
| PDIP (N) | 16 | 181.42 mm² 19.3 x 9.4 |
| SOIC (D) | 16 | 59.4 mm² 9.9 x 6 |
| SOP (NS) | 16 | 79.56 mm² 10.2 x 7.8 |
| TSSOP (PW) | 16 | 32 mm² 5 x 6.4 |
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