The x92FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or buses carrying parity. The x92FCT841T devices are buffered 10-bit-wide versions of the FCT373 function.
The x92FCT841T devicesx92 high-performance interface is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Number of channels | 10 |
| Technology family | FCT |
| Supply voltage (min) (V) | 4.75 |
| Supply voltage (max) (V) | 5.25 |
| Input type | TTL-Compatible CMOS |
| Output type | 3-State |
| Clock frequency (max) (MHz) | 70 |
| IOL (max) (mA) | 64 |
| IOH (max) (mA) | -32 |
| Supply current (max) (µA) | 200 |
| Features | Flow-through pinout, Partial power down (Ioff), Very high speed (tpd 5-10ns) |
| Operating temperature range (°C) | -40 to 85 |
| Rating | Catalog |
| SOIC (DW) | 24 | 159.65 mm² 15.5 x 10.3 |
| SSOP (DBQ) | 24 | 51.9 mm² 8.65 x 6 |
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