This 18-bit buffer and line driver is designed for 1.65-V to 3.6-V VCC operation.
This SN74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data.
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all nine affected outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.
The SN74ALVCH16825 is characterized for operation from &$150;40°C to 85°C.
Widebus, EPIC are trademarks of Texas Instruments.
| Technology family | ALVC |
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 18 |
| IOL (max) (mA) | 24 |
| Supply current (max) (µA) | 40 |
| IOH (max) (mA) | -24 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Features | Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SSOP (DL) | 56 | 190.647 mm² 18.42 x 10.35 |
| TSSOP (DGG) | 56 | 113.4 mm² 14 x 8.1 |
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