This 16-bit registered transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using CEBA, LEBA, and OEBA.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16543 is characterized for operation from 40°C to 85°C.
Widebus, EPIC are trademarks of Texas Instruments.
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 16 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -24 |
| Input type | LVTTL |
| Output type | LVTTL |
| Features | Balanced outputs, Bus-hold, Ultra high speed (tpd <5ns) |
| Technology family | ALVC |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SSOP (DL) | 56 | 190.647 mm² 18.42 x 10.35 |
| TSSOP (DGG) | 56 | 113.4 mm² 14 x 8.1 |