These octal transceivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The 'LVT543 contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (
or
) and output-enable(
or
) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (
) input must be low in order to enter data from A or to output data from B. If
is low and
is low, the A-to-B latches are transparent; a subsequent low-to-high transition of
puts the A latches in the storage mode. With
and
both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the
,
, and
inputs.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down,
should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVT543 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LVT543 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVT543 is characterized for operation from -40°C to 85°C.
| Supply voltage (min) (V) | 2.7 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 8 |
| IOL (max) (mA) | 64 |
| IOH (max) (mA) | -32 |
| Input type | TTL/CMOS |
| Output type | LVTTL |
| Features | Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) |
| Technology family | LVT |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SOIC (DW) | 24 | 159.65 mm² 15.5 x 10.3 |
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