This 9-bit bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC863A is designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing.
This device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA) inputs.
The outputs are in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Supply voltage (min) (V) | 1.65 |
| Supply voltage (max) (V) | 3.6 |
| Number of channels | 9 |
| IOL (max) (mA) | 24 |
| IOH (max) (mA) | -24 |
| Input type | TTL/CMOS |
| Output type | LVTTL |
| Features | Balanced outputs |
| Technology family | LVC |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SOIC (DW) | 24 | 159.65 mm² 15.5 x 10.3 |
| TSSOP (PW) | 24 | 49.92 mm² 7.8 x 6.4 |
| TVSOP (DGV) | 24 | 32 mm² 5 x 6.4 |