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TI(德州仪器) CD74HC4514
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  • TI(德州仪器) CD74HC4514
  • TI(德州仪器) CD74HC4514
  • TI(德州仪器) CD74HC4514
  • TI(德州仪器) CD74HC4514
  • TI(德州仪器) CD74HC4514
  • TI(德州仪器) CD74HC4514
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CD74HC4514

CD74HC4514

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带输入锁存器的高速 CMOS 逻辑 4 线至 16 线解码器/多路信号分离器

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The CD54HC4514, CD74HC4514, and CD74HC4515 are high-speed silicon gate devices consisting of a 4-bit strobed latch and a 4-to-16 line decoder. The selected output is enabled by a low on the enable input (E). A high on E inhibits selection of any output. Demultiplexing is accomplished by using the E input as the data input and the select inputs (A0-A3) as addresses. This E input also serves as a chip select when these devices are cascaded.

When Latch Enable (LE) is high the output follows changes in the inputs (see truth table). When LE is low the output is isolated from changes in the input and remains at the level (high for the 4514, low for the 4515) it had before the latches were enabled. These devices, enhanced versions of the equivalent CMOS types, can drive 10 LSTTL loads.

  • Multifunction Capability
    • Binary to 1-of-16 Decoder
    • 1-to-16 Line Demultiplexer
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

Technology familyHC
Number of channels1
Operating temperature range (°C)-55 to 125
RatingCatalog
Supply current (max) (µA)160
SOIC (DW)24159.65 mm² 15.5 x 10.3
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