SN74LVT16952系列介绍资料

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SN74LVT16952

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具有三态输出的 3.3V ABT 16 位寄存收发器

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The 'LVT16952 are 16-bit registered transceivers designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (or ) input is low. Taking the output-enable ( or ) input low accesses the data on either port.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

To ensure the high-impedance state during power up or power down, should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVT16952 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The SN54LVT16952 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVT16952 is characterized for operation from -40°C to 85°C.

State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation
Members of the Texas Instruments Widebus^TM Family
Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
Support Unregulated Battery Operation Down to 2.7 V
Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
Support Live Insertion
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
Widebus is a trademark of Texas Instruments Incorporated.

Supply voltage (min) (V)	2.7
Supply voltage (max) (V)	3.6
Number of channels	16
IOL (max) (mA)	64
IOH (max) (mA)	-32
Input type	TTL/CMOS
Output type	LVTTL
Features	Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)
Technology family	LVT
Rating	Catalog
Operating temperature range (°C)	-40 to 85

SSOP (DL)	56	190.647 mm² 18.42 x 10.35
TSSOP (DGG)	56	113.4 mm² 14 x 8.1

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SN74LVT16952

具有三态输出的 3.3V ABT 16 位寄存收发器

4000-306-326