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The CY74FCT2827T 10-bit buffer provides high-performance bus-interface buffering for wide data/address paths or buses carrying parity. This 10-bit buffer has NANDed output-enable (OE) inputs for maximum control flexibility. The CY74FCT2827T is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes and all outputs are designed for low-capacitance bus loading in the high-impedance state. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2827T can replace the CY74FCT827T to reduce noise in an existing design.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.