The ’ABT162827A devices are noninverting 20-bit buffers composed of two 10-bit buffers with separate output-enable signals. For either 10-bit buffer, the two output-enable (1OE1 and 1OE2, or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer are in the high-impedance state.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 25-
series resistors to reduce overshoot and undershoot.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Widebus is a trademark of Texas Instruments.
| Technology family | ABT |
| Supply voltage (min) (V) | 4.5 |
| Supply voltage (max) (V) | 5.5 |
| Number of channels | 20 |
| IOL (max) (mA) | 12 |
| Supply current (max) (µA) | 32000 |
| IOH (max) (mA) | -12 |
| Input type | TTL-Compatible CMOS |
| Output type | 3-State |
| Features | Balanced outputs, Damping resistors, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SSOP (DL) | 56 | 190.647 mm² 18.42 x 10.35 |
| TSSOP (DGG) | 56 | 113.4 mm² 14 x 8.1 |
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