The CY29FCT52T has two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Separate clock, clock enable, and 3-state output-enable signals are provided for each register. Both A outputs and B outputs are specified to sink 64 mA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Supply voltage (min) (V) | 4.75 |
| Supply voltage (max) (V) | 5.25 |
| Number of channels | 8 |
| IOL (max) (mA) | 64 |
| IOH (max) (mA) | -32 |
| Input type | TTL-Compatible CMOS |
| Output type | TTL |
| Features | Partial power down (Ioff), Ultra high speed (tpd <5ns) |
| Technology family | FCT |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 85 |
| SOIC (DW) | 24 | 159.65 mm² 15.5 x 10.3 |
| SSOP (DBQ) | 24 | 51.9 mm² 8.65 x 6 |
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