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The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.

The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output enables (OEB and OEB) are provided for the B outputs. When OEB is low, OEB is high, or V_CC is less than 2.1 V, the B port is turned off.

The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when V_CC is less than 2.1 V, the A outputs are in the high-impedance state.

BIAS V_CC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when V_CC is not connected.

BG V_CC and BG GND are the supply inputs for the bias generator.