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特性
- Complete 16-bit data acquisition system
- Simultaneous sampling of 8 internally buffered channels
- 250 kSPS per channel throughput
- Differential, wide common-mode range inputs
- ±75 pA typical input leakage at 25°C
- Full-scale input step settling time < 300 ns
- Integrated reference and reference buffer (4.096 V)
- Integrated supply decoupling capacitors
- 27 mW per channel at 250 kSPS, scales with throughput
- Minimal external signal conditioning
- Seamless high dynamic range
- Per sample, per channel automatic gain ranging
- Maintains ppm-level INL
- Per channel SoftSpan input ranges, bipolar or unipolar
- ±40 V, ±25 V, ±20 V, ±12.5 V, ±10 V, ±6.25 V, ±5 V, ±2.5 V
- 0 V to 40 V, 25 V, 20 V, 12.5 V, 10 V, 6.25 V, 5 V, 2.5 V
- Rail-to-rail input overdrive tolerance
- High performance
- INL: ±160 μV typical (±40 V range)
- SNR: 94.6 dB single-conversion typical (±40 V range)
- DR: 98.1 dB single-conversion typical (±40 V range)
- THD: −117 dB typical (±40 V range)
- CMRR: 120 dB typical
- Digital flexibility
- SPI CMOS (0.9 V to 5.25 V) and LVDS serial input and output
- Optional oversampling with 16-bit digital averaging
- Optional offset, gain, and phase correction
- 7.00 mm × 7.00 mm, 64-ball BGA full solution footprint
产品详情和应用
The AD4855 is a fully buffered, 8-channel simultaneous sampling, 16-bit, 250 kSPS data acquisition system (DAS) with differential, wide common-mode range inputs. Its functional architecture is shown in Figure 1. Operating from a 5 V low voltage supply, flexible input buffer supplies, and using the precision low drift internal reference and reference buffer, the AD4855 allows the SoftSpan range of each channel to be independently configured to match the native application signal swing, minimizing additional external signal conditioning. To further maximize single-conversion dynamic range, the AD4855 incorporates seamless high dynamic range (SHDR) technology. When enabled, the input signal path gain of the channel is automatically optimized on a sample-by-sample basis, minimizing converter noise on each sample without impacting linearity.
The 11 MHz bandwidth, picoamp input analog buffers, wide input common-mode range, and 120 dB common-mode rejection ratio (CMRR) of the AD4855 allow the DAS to directly digitize input signals with arbitrary swings on INx+ and INx−. Its input signal flexibility, combined with ±160 μV integral nonlinearity (INL), no missing codes at 16 bits, 94.6 dB signal to noise ratio (SNR), and 98.1 dB dynamic range, make the AD4855 an ideal choice for applications requiring high accuracy, throughput, and precision in a compact solution footprint. Enabling 16-bit oversampling offers further SNR and dynamic range improvements. Optional per channel offset, gain, and phase adjustment provide the ability to calibrate and remove system-level errors upstream to the DAS.
The AD4855 features a serial peripheral interface (SPI) register configuration bus (0.9 V to 5.25 V) and supports both low voltage differential signaling buses (LVDS) and complementary metal-oxide semiconductor (CMOS) conversion data output buses, selectable using the LVDS/CMOS pin. Betw
