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特性
- 0.56Ω typical on resistance
- High continuous current of up to 768 mA
- Flat RON across signal range of 0.004 Ω
- THD of −127 dB at 1 kHz
- Route through pins for digital signals and supplies
- Integrated passive components
- SPI with error detection
- Guaranteed break-before-make switching, allowing external wiring of switches to deliver multiplexer configurations
- Fully specified at ±20V and +36V
- 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V (excludes SPI read back to a 1.8V device)
- 4 mm × 5 mm, 30-terminal LGA
产品详情和应用
The ADGS6414D contains eight independent, low on-resistance, single-pole/single-throw (SPST) switches in a 4mm × 5mm, 30-terminal LGA package.
The ADGS6414D enables higher channel density in systems where printed circuit board space is constrained or existing system form factors restrict expansion.
When using SPI daisy-chain mode, the unique route through pins provide considerable space savings when multiple ADGS6414D instances are combined to design very high channel count systems, such as large switching matrices and fanout applications. The integrated supply decoupling capacitors and SDO pullup resistor further increase the space savings and reduce printed circuit board complexity.
The low on-resistance (0.56Ω typical) of each switch channel allows for higher current density in systems where heat dissipation is an issue, and the on-resistance profile of the switch channels is exceptionally flat over the full-analog input range, which ensures good linearity and low distortion when switching precision analog signals.
Each switch has an input signal range from VSS to VDD – 2V. When on, each switch conducts equally well in both directions, and in the off condition, signal levels up to the supplies are blocked.
The SPI has robust error detection features, such as cyclic redundancy check (CRC) error detection, invalid read and write address detection, and SCLK count error detection.
PRODUCT HIGHLIGHTS
- The SPI removes the need for parallel conversion, logic traces, and reduces the general-purpose input/output (GPIO) channel count.
- Daisy-chain mode removes additional logic traces when multiple devices are used.
- Route through of digital signals and supplies eases routing and allows for an increase in channel density.
- Integrated passive components eliminate the need for external passive components.
